System for automatically and manually testing lines for determining if information can be accurately transmitted thereon

ABSTRACT

A hardline monitoring system for monitoring a plurality of lines over which signals are transmitted in order to determine if the characteristics of the lines are within certain predetermined tolerances. The monitoring system includes a programmer, an electronic scanner, an analyzer, a display and control panel, a signal generator, a computer interface unit, and a checkout computer. In operation, the electronic scanner, which is under the control of the programmer, scans a plurality of hardlines or cables over which the signals are transmitted. The programmer, in turn, couples these lines through the scanner to an analyzer which analyzes the signals to determine if there is any distortion or deterioration of the line. If the signals being transmitted are out of tolerance, then the analyzer sends such information to a display and control panel to illuminate a lamp indicating such. Such information is also fed to a checkout computer through a computer interface unit and the programmer. A signal generator is provided for placing continuous data signals, FM signals and wordburst signals on the line when such is necessary.

United States Patent Richards et al.

SYSTEM FOR AUTOMATICALLY AND MANUALLY TESTING LINES FOR DETERMINING IF INFORMATION CAN BE ACCURATELY TRANSMI'I'I'ED THEREON Inventors: Leo 0. Richards, 8344 Sylvan Drive, West Melbourne, Fla. 32901; Walter E. Parsons, Route 1, Box 53 A, Kissimmee, Fla. 32741 Filed: Dec. 4, 1969 Appl. No.: 882,123

US. Cl ..324/73, 324/51, 340/413 ..G01r 15/12, GOlr 31/00 Field of Search ..324/51, 66, 73; l79/175.25,

References Cited UNITED STATES PATENTS 6/1967 MacArthur... ...340/154 X 8/1960 Stahl ..324/51 X 11/1965 Topp et a1 ..324/73 Carver Akerlund...

Anderson CHECK OUT SYSTEM INCLUDING COMPUTER COMPUTER INTERFACE UNIT SCANNER ELECTRONIC [451 May 23, 1972 Chalfin et al. ..324/73 3,246,240 4/ 1966 Arnold et al... ....324/51 X 3,299,220 1/ 1967 Wedmore ....324/73 X 3,323,059 5/1967 Erickson et al. ..324/73 X Primary Examiner-Gerald R. Strecker Attorney-James 0. Harrell and G. T. McCoy [s11 ABSTRACT A hardline monitoring system for monitoring a plurality of lines over which signals are transmitted in order to determine if the characteristics of the lines are'within certain predetermined tolerances. The monitoring system includes a programmer, an electronic scanner, an analyzer, a display and control panel, a signal generator, a computer interface unit, and a checkout computer. In operation, the electronic scanner, which is under the control of the programmer, scans a plurality of hardlines or cables over which the signals are transmitted. The programmer, in turn, couples these lines through the scanner to an analyzer which analyzes the signals to determine if there is any distortion or deterioration of the line. If the signals being transmitted are out of tolerance, then the analyzer sends such information to a display and control panel to illuminate a lamp indicating such. Such information is also fed to a checkout computer through a computer interface unit and the programmer. A signal generator is provided for placing continuous data signals, FM signals and wordburst signals on the line when such is necessary.

10 Claim, 27 Figures DISPLAY 4 CONTROL PANEL PROGRAMMER ANALYZER SIGNAL GENERATOR Patented May 23, 1972 3,665,303

20 Sheets-Sheet 1 CHECK OUT SYSTEM INCLUDING COMPUTER COMPUTER ELECTRONIC DISPLAY t INTERFACE SCANNER CONTROL UNIT PANEL PROGRAMMER l7 6 SIGNAL ANALYZER GENERATOR INVENTORz LEO O. RICHARDS WALTER E. PARSONS Patented May 23, 1972 3,665,303

20 Sheets-Sheet 2 FROM 30 v COMPUTER To LA5 G INTERFACE F] G H 23 [Asa 24 SEQUENTIAL Fl at PBI A9 Z 4 6 To gaLA I Q FIG l4 u 3 2a A 3 71].. \J-x,

Q j H2 42 We 40 MINOR LA 2 n SEQUENTIAL 1L w v 23 SCAN 4 83 (4 Q9 T cw P85 i 1e 49 2 FIG \4 a 53 2 4a 44 \.7- MINOR @0 2| RANDOM L 23 SCAN 1 L t 24 T0 LA|7-A P86 a 52mg l9 FIG 9 is F To LAl4-D j 4 1 FIG 4 v Nam M A a 23 CAN F L 24 T0 LAW-E PB? a 2m 2 FIG 9 6 z am- J MINOR c D RANDOM -4J SCAN 3 L 24 T0 LAl7-J P88 J: fine 21 FIG 9 H aws4 25 5 NOR E F 23 "3??? '1 L L: 24 T0 LAl7 N P59 Jim 2 Fla 9 To A TOLAI4-D COMPUTER T INTERFACE 25 MODE REGISTER 'NVENTOR TO ST LAllA-Z PRQGRAMER LEO O. RICHARDS FIG 3 WALTER E. PARSONS Patented May 23, 1972 V 3,665,303

20 Sheets-Sheet s m A FROM COMPUTER LG? INTERFACE TO LBZIA I F1615 OUTPUT LA| LAIOE LAl4A I9 I SELF TEST ClRCUiT fir I To FIG9 lABY LA8Z LA PHASE LAMB TIMING CLOCK OUTPUT) CHECK PHASE LAME SHIFT REGISTER OUTPUT mom 1 FIGIB I 25 I ANALYZER TIMING IQ Q? ST CLOCK COUNTER Z i? I I 27 I I I l l a I a] g g g LAsc as as g 38 R5 :2 A F"- l L 39 F A- I FROMLASFJCILM I5 L 6 MODE PHASE ""PIs TTzR 1: LAWH V 5 T LBZlE-FIGI? 7 7 4c z LAB a1 commuous 4 iii A 35 1 "ik M16 To LB4L-Fl6 2| :7 5 T0 L- L58 6 PROGRAMER (com) LE0 0 EKQSQ WALTER E PARSONS 3. W W EAAAAL To @A "*7 Patented May 23, 1972 I 3,665,303

' 20 Sheets-Sheet 6 TO SELF E TO cmcurr-nma .s LAIY LAN 8 LAM LAM Q A LAM C FROM -M1157 muss FROM; E in was:

2 menu FIGJQ FROM LAM-a Ft6+ Y 5 L/fd3'4l ToLAuA-li H63 LA LA 4 l0 :5 1mm. LA

5 B I 34c 0 60 a Leu a 2a.: 5 H0 2: v Lam B x g' mvsmolzs LEO O. RlCHARDS WALTER E. PARSONS Patented May 23, 1972 3,665,303

20 Sheets-Sheet 5 235: FROM CA6Z FROM THUMBWHEEL SWITCHES FIG l4 $20M cnes FROMCAG4 FROM CAGS FROM cm FROM one? mm was mamas INPUT 9 3 91/ w INVERTERS 48 L L 1 K 4| 2v 3;

LA 5 38 W 4 INPUT 41 48 STROBE GATES RING COUNTER FIGS LA4B-4 O n E FIGB L ,4 mom 2 RANDOM LAND SCAN FIG. GATES FROM 5! FIG I4 52 OUTPUT GATES OUTPUT INVERTERS SCAN REGISTER INVENTORS LEO 0. RICHARDS F 7, BY WALTER E. PARSONS K 9 Qwwfl M Patented May 23, 1972 3,665,303

20 Sheets-Sheet 6 FROM FIG l4 f FROM CA70 FROM CA'II FROM CAYZ CATS FROM M74 FROM CATS FROM CH6 FROM CA7? LA2 LA2 LA2 M J P FIG 7 LA3E -43 FROM- ANALYZER ENABLE GATES FIG 25 LA7 LA7 LA'1 LA7 LA7 c F A s e T0 T0 FIG I6 FIGIG SCAN REGISTER (commuso) INVENTORS LEO O. RICHARDS WALTER E. PARSONS 8 BY C9 Patented May 23, 1972 3,665,303

20 SheetswShQet 7 CHECK I PHASE u SHIFT z 8 REGISTER Fl G5. 34

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. c0 FROM TEST sue. f FROM L52 l LA4F-l9 16b FIG.7 To LAM-43 LS3 mom H63 r @122 mom L35 L L54 was F FIG.2 L TO LS5 m4 ,LA|M D 4: LASR FIG.7 LS6 FROM LAQH FROM 6 mg: LAlO may, L57 Flea.

RANDOM SCAN CIRCUITRY L58 11 l ,I L59 A LSIO/ V LSIZ/ 1 Lslaf i L5l4 i J. LSI5 e JP T0 co BUS me. 22 INVENTOR:

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LEO O. RICHARDS WALTER E. PARSONS Patented May 23, 1972 3,665,303

20 Sheets-Sheet 1o TO FlcTs 7+8 SEQUENTIAL MODES THUMBWHEEL SWITCHES 0 fg. 0

HARDLINES INVENTOK LEO O. RICHARDS WALTER E. PARSONS 61M Patented May 23, 1972 3,665,303

20 Sheets- Sheet 11 FROM LBZGL-ZS new LB TO --|.a2a0-5o new? me A was WORD BURST CYCLE TIMER FROM 62 8'} LAlG-F 2 FROM was SETFIGJ 1 LB F|G',3

SA 30 28 A CLOCK RESET RB T RESET W B STROBE LBIIC 38 FIG. I8 k LP i) MEMORY MEMORY INVENTORS LEO O. RICHARDS BY WALTER E. PARSONS Wfl M 4 a c atented May 23, 1972 20 Sheets-Sheet 15 LBll glv'f cfig" L29; 7*} L51 -L$6 LA! L K l- LBII 'ro LS'I-LSIZ D FIG. l6

LAl To LSIQ-LSIG new LA LA LB" LB L8 L8 u I] 25 25 25 E F A a8 C D LA'BO FROM 0 CLOCK [.6250-52 m5 LB25c-45 H6 LB25B39 TO LA29P new] LBIO 6 r0 LA 29 0. FIG. I?

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TOLAIOB-G FIG-$.56

INVENTORS m LEO O. RICHARDS WORD BURST MONITOR (CONT) WALTER E. PARSONS Patented May 23, 1972 20 Sheets-Sheet 15 1 OF E am wm INVENTOR5 LEO O. RICHARDS BY WALTER E. PARSONS Patented May 23, 1972 20 Sheets-5heet 1v INVENTOR LEO O. RICHARDS WALTER E.PARSONS IIIAI 2 5 In Patented May 23, 1972 20 sheets-wsheet 19 mm Q2 83E Nm 904 29G Sin-DJ 20m.

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1. An apparatus for monitoring a plurality of hardlines in order to determine if the information being transmitted comes within certain predetermined tolerances comprising: A. an electronic scanner coupled to said hardlines for selectively making connection with said hardlines; B. an analyzing circuit coupled to said scanner; C. a plurality of hardline selection switches; D. means for setting said selection switches to select the hardline upon which the scanning cycle begins and ends, E. means for coupling said hardlines to said selection switches; F. said scanner incLuding;
 1. a plurality of input strobe gates;
 2. means for coupling said selection switches to said input strobe gates;
 3. a ring counter having a plurality of stages; and
 4. means for coupling the output of each of said strobe gates to a respective stage of said ring counter for enabling a particular sequence of stages according to the setting on said selection switches; G. said analyzing circuit including analyzers for generating signals indicative of the condition of said information being transmitted over said hardlines; H. means for interrupting the scanning operation when a particular type of information is being transmitted over one of said hardlines; I. means for coupling at least one of said analyzers to said one of said hardlines for analyzing said particular type information while said scanning operation is interrupted; and J. means for resuming the scanning operation after said particular information has been analyzed.
 2. means for coupling said selection switches to said input strobe gates;
 2. The apparatus as set forth in claim 1 further comprising: A. a plurality of output gates coupled to respective stages of said ring counter, and B. said analyzers being coupled to said output gates for analyzing information on predetermined hardlines according to when said output gates are enabled by said ring counter.
 3. The apparatus as set forth in claim 2 further comprising: A. a plurality of random scan gates interposed between respective stages of said ring counter and said output gates for blocking signals from said ring counter to said output gates when said random scan gates are disabled.
 3. a ring counter having a plurality of stages; and
 4. means for coupling the output of each of said strobe gates to a respective stage of said ring counter for enabling a particular sequence of stages according to the setting on said selection switches; G. said analyzing circuit including analyzers for generating signals indicative of the condition of said information being transmitted over said hardlines; H. means for interrupting the scanning operation when a particular type of information is being transmitted over one of said hardlines; I. means for coupling at least one of said analyzers to said one of said hardlines for analyzing said particular type information while said scanning operation is interrupted; and J. means for resuming the scanning operation after said particular information has been analyzed.
 4. The apparatus as set forth in claim 3 further comprising: A. a random scan register coupled to said ring counter for being enabled when said scan gates are disabled, and B. a patchboard coupled between said random scan register and said output gates for setting up minor random scan sequences of said hardlines.
 5. The apparatus as set forth in claim 2 further comprising: A. a memory register coupled to the output of each of said output gates and said analyzers; B. said memory register including lamp means for being illuminated indicative of the condition of said information being transmitted on said hardlines.
 6. An apparatus for monitoring a plurality of hardlines in order to determine the condition of information being transmitted thereover comprising: A. a plurality of selection switches coupled to said hardlines for selecting a predetermined group of said hardlines to be monitored; B. a ring counter having a plurality of stages; C. means for coupling said hardlines to said stages of said ring counter through said selection switches; D. means for sequentially enabling said stages of said ring counter for scanning said hardlines coupled thereto; E. a plurality of output gates coupled to respective stages of said ring counter; F. a plurality of bus bars coupled to said output gates, one of said bus bars for each different type of information to be analyzed; G. an analyzer coupled to each of said bus bars for analyzing a particular type of information appearing on said bus bars; H. switch means interposed between said output gates and said bus bars for selectively connecting said output gates to a particular bus bar so that information can be fed to a designated one of said analyzers, and I. memory means coupled to said output gates and said analyzers for generating a signal indicative of the condition of the information being transmitted over a particular hardline.
 7. The apparatus as set forth in claim 6 further comprising: A. a plurality of random scan gates interposed between respective stages of said ring counter and said output gates for blocking signals from said ring counter to said output gates when said scan gates are disabled; B. a random scan register means coupled to said ring counter being enabled when said scan gates are disAbled; and C. a patchboard coupled between said random scan register means and said output gates for setting up minor random scan sequences of said hardlines.
 8. The apparatus as set forth in claim 7, wherein said analyzers include: A. an analyzer for analyzing wordburst signals.
 9. The apparatus as set forth in claim 7, wherein said analyzers include: A. an analyzer for analyzing continuous data signals, and B. an analyzer for analyzing frequency modulated signals.
 10. The apparatus as set forth in claim 9, wherein said analyzers further include: A. an analyzer for analyzing wordburst signals; B. means for interrupting said scanning operation when a wordburst signal appears on a hardline, and C. means for automatically switching said wordburst analyzer to said hardline upon which said wordburst signal appears. 